JK flip flop diagram, excitation, characteristic, Truth table
JK FLIP FLOP:-
Friends, the characteristics of JK flip flop are exactly like SR flip flop. J and K behave exactly like S and R, such as J as set and K as reset. When we work on SR flip flop, there is a case when J = 1 and K = 1, then indeterminate condition comes in SR flip flop. Due to which the result of this case is not known. To overcome this indeterminate condition, we use JK flip flop. In this flip flop, this indeterminate condition goes away and we get to know the result of this case. In Fig 1 you can see the symbolic diagram of JK flip flop. We will know about its different case and from these cases we will also design its truth table.
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| Fig 1. Graphical symbol of JK flip flop |
WORKING OF JK FLIP FLOP:-
We will understand the working of JK flip flop with the help of NAND gate as you see in fig 2. We have divided the working of JK flip flop in some cases.
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| Fig 2. JK flip flop using NAND gate |
CASE 1:-
When J = 0, K = 0, Q = 0, Q+1 = ?
As given in Fig 3. When J = 0, the output of NAND gate 1 directly will be '1'. Similarly if K = 0, the output of NAND gate 2 directly will be '1'. In this case if we keep the value of Q as '0', then '0' will go to the input of NAND gate 4 so that the output of NAND gate 4 will be '1'. Now this '1' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '0'. Now we have got the value '0' of Q + 1.
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| Fig 3 |
CASE 2:-
When J = 0, K = 0, Q = 1, Q+1 = ?
As given in Fig. 4. When J = 0, the output of NAND gate 1 directly will be '1'. Similarly if K = 0, the output of NAND gate 2 directly will be '1'. In this case, if we keep the value of Q as '1', then '1' will go to the input of NAND gate 4, so that the output of NAND gate 4 will be '0'. Now this '0' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '1'. Now we have got the value '1' of Q + 1.
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| Fig 4 |
CASE 3:-
When J = 0, K = 1, Q = 0, Q+1 = ?
When J = 0, the output of NAND gate 1 directly will be '1'. Similarly, if K = 1, then as the value of Q in Fig 5 is kept '0', now this value will go to the input of NAND gate 2. We have given the value of Q to the input of NAND gate 2 because K = 1. Due to this the output of NAND gate 2 will be '1'. The value of Q which is '0' will go to the input of NAND gate 4 and thereby the output of NAND gate 4 will be '1'. Now this '1' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '0'. Now we have got the value '0' of Q + 1.
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| Fig 5 |
CASE 4:-
When J = 0, K = 1, Q = 1, Q+1 = ?
When J = 0, the output of NAND gate 1 directly will be '1'. Similarly, if K = 1, then as the value of Q in Fig 6 is kept '1', now this value will go to the input of NAND gate 2. Due to this the output of NAND gate 2 will be '0'. The value of Q which is '1' will go to the input of NAND gate 4 and thereby the output of NAND gate 4 will be '1'. Now this '1' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '0'. Now we have got the value '0' of Q + 1.
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| Fig 6 |
CASE 5:-
When J = 1, K = 0, Q = 0, Q+1 = ?
When J = 1, then as in Fig 7 if the value of Q is kept as '0' then the value of Q̅ will be '1'. We have given the value of Q̅ to the input of NAND gate 1 because J = 1. Now this value will go to the input of NAND gate 1. This will cause the output of NAND gate 1 to be '0'. Similarly if K = 0, the output of NAND gate 2 directly will be '1'. The value of Q which is '0' will go to the input of NAND gate 4 and thereby the output of NAND gate 4 will be '1'. Now this '1' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '1'. Now we have got the value '1' of Q + 1.
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| Fig 7 |
CASE 6:-
When J = 1, K = 0, Q = 1, Q+1 = ?
When J = 1, then as in Fig 8 if the value of Q is kept as '1' then the value of Q̅ will be '0'. Now this value will go to the input of NAND gate 1. Due to this the output of NAND gate 1 will be '1'. Similarly if K = 0, the output of NAND gate 2 directly will be '1'. The value of Q which is '1' will go to the input of NAND gate 4, which will cause the output of NAND gate 4 to be '0'. Now this '0' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '1'. Now we have got the value '1' of Q + 1.
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| Fig 8 |
CASE 7:-
When J = 1, K = 1, Q = 0, Q+1 = ?
When J = 1, then as in Fig 9 if the value of Q is kept as '0' then the value of Q̅ will be '1'. Now this value will go to the input of NAND gate 1. This will cause the output of NAND gate 1 to be '0'. Similarly, if K = 1, the value of Q which is '0' will go to the input of NAND gate 2. Due to this the output of NAND gate 2 will be '1'. The value of Q which is '0' will go to the input of NAND gate 4, which will cause the output of NAND gate 4 to be '1'. Now this '1' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '1'. Now we have got the value '1' of Q + 1.
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| Fig 9 |
CASE 8:-
When J = 1, K = 1, Q = 1, Q+1 = ?
When J = 1, then as in Fig 10 if the value of Q is kept as '1' then the value of Q̅ will be '0'. Now this value will go to the input of NAND gate 1. Due to this the output of NAND gate 1 will be '1'. Similarly, if K = 1, the value of Q which is '0' will go to the input of NAND gate 2. Due to this the output of NAND gate 2 will be '1'. The value of Q which is '1' will go to the input of NAND gate 4, which will cause the output of NAND gate 4 to be '1'. Now this '1' will go to the input of NAND gate 3 and the output of NAND gate 3 will be '0'. Now we have got the value '0' of Q + 1.
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| Fig 10 |
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| Fig 11. Present state - Next state table for JK flip flop |
TRUTH TABLE OF JK FLIP FLOP:-
The truth table of JK flip flop is the extract of these eight cases which we have read above. As given in Fig. 12.
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| Fig 12. Truth table for JK flip flop |
1) When the value of J and K is '0' and if we take the value '0' of Q then we get Q + 1 output '0' and if we take the value '1' of Q then we get Q + 1 Output '1' is available only. So to say this means that we are getting Q only from the value of Q.
2) When J = 0 and K = 1, the value of Q is always output '0' at '0' and '1'.
3) When J = 1 and K = 0, the value of Q is always output '1' at '0' and '1'.
4) When the value of J and K is '1' and if we take the value '0' for Q then we get Q + 1 output '1' and if Q takes the value '1', then we get Q + 1. Only output '0' is available. So to say that we are getting Q̅ from the value of Q means that we are getting the complement of Q.
CHARACTERISTIC EQUATION OF JK FLIP FLOP:-
We will design a K-map based on the present state to next state table in Fig 11. Then from this K-map we will find the characteristic equation of JK flip flop. Please see the Fig 12 for K-map.
00 = J̅ K̅ 0 = Q̅
01 = J̅ K 1 = Q
11 = J K
10 = J K̅
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| Fig 13. K-map for JK flip flop |
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